项目作者： donahum

项目描述：
ECE437 Labs

高级语言： HTML

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项目地址: git://github.com/donahum/MIPS-Processor-Design.git

创建时间： 2019-02-12T20:47:20Z
项目社区：https://github.com/donahum/MIPS-Processor-Design
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MIPS-Processor-Design

ECE437 Labs

This is the repository for my ECE437 design labs. This course iterates through the following designs for processors:
1) Single-cycle
2) 5 Stage Pipeline
3) Caches
4) Multi-core

All designs are tested with simulated memory latency, in simulation, synthesis, and on an Altera FPGA. The course staff provides some test files that you can compare with a simulator to view which instructions should’ve been executed, and what you’ve written to memory.