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项目作者： Kenta11

项目描述 ：
generate Makefile and tcl script
高级语言： Python
项目地址: git://github.com/Kenta11/vivado_hls_create_project.git
创建时间： 2019-02-11T14:34:34Z
项目社区：https://github.com/Kenta11/vivado_hls_create_project
开源协议：MIT License
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vivado_hls_create_project

日本語バージョン: vivado_hls_create_project

Overview

A tool to automatically generate Makefile and tcl scripts for Vivado HLS.

Requirements

  • Python3 and pip
  • GNU Make

Install

  1. $ sudo pip install git+https://github.com/Kenta11/vivado_hls_create_project
  2. $ vivado_hls_create_project set-config path_to_vivado /path/to/Xilinx/Vivado/20xx.x

Basic Usage

You can select a function by subcommands.

  1. Usage: vivado_hls_create_project [-h|--help] <command> [<args>]
  3. Makefile and tcl scripts generator for Vivado HLS
  5. <command>:
  6.     list         list usable boards
  7.     create       create Makefile and tcl scripts
  8.     set-config   set parameter into ~/.vivado_hls_create_project
  9.     get-config   get parameter from ~/.vivado_hls_create_project
  11. optional arguments:
  12.   -h, --help     show this help message and exit

Subcommands list,create,set-config and get-config are available.

create

Enter project name (sample) and a board name (Xilinx_ZedBoard) as follows.

  1. $ vivado_hls_create_project create -b Xilinx_ZedBoard sample

sample directory is generated, then Makefile and tcl scripts are also generated under the directory.

  1. $ tree sample
  2. sample
  3. ├ ─ ─  Makefile
  4. ├ ─ ─  directives.tcl
  5. ├ ─ ─  include
  6. │    └ ─ ─  sample.hpp
  7. ├ ─ ─  script
  8. │    ├ ─ ─  cosim.tcl
  9. │    ├ ─ ─  csim.tcl
  10. │    ├ ─ ─  csynth.tcl
  11. │    ├ ─ ─  export.tcl
  12. │    └ ─ ─  init.tcl
  13. ├ ─ ─  src
  14. │    └ ─ ─  sample.cpp
  15. └ ─ ─  test
  16.     ├ ─ ─  include
  17.     └ ─ ─  src
  18.         └ ─ ─  test_sample.cpp
  20. 6 directories, 10 files

See create -h for more options.

list

list shows boards name that can be specified with create subcommand.

  1. $ vivado_hls_create_project list
  2. Board               | Part
  3. --------------------|-------------------------------
  4. ac701               | xc7a200tfbg676-2
  5. arty                | xc7a35ticsg324-1L
  6. arty-a7-100         | xc7a100tcsg324-1
  7. arty-a7-35          | xc7a35ticsg324-1L
  8. arty-s7-25          | xc7s25csga324-1
  9. arty-s7-50          | xc7s50csga324-1
  10. arty-z7-10          | xc7z010clg400-1
  11. arty-z7-20          | xc7z020clg400-1
  12. basys3              | xc7a35tcpg236-1
  13. cmod-s7-25          | xc7s25csga225-1
  14. cmod_a7-15t         | xc7a15tcpg236-1
  15. cmod_a7-35t         | xc7a35tcpg236-1
  16. cora-z7-07s         | xc7z007sclg400-1
  17. cora-z7-10          | xc7z010clg400-1
  18. eclypse-z7          | xc7z020clg484-1
  19. genesys2            | xc7k325tffg900-2
  20. kcu116              | xcku5p-ffvb676-2-e
  21. nexys-a7-100t       | xc7a100tcsg324-1
  22. nexys-a7-50t        | xc7a50ticsg324-1L
  23. nexys4              | xc7a100tcsg324-1
  24. nexys4_ddr          | xc7a100tcsg324-1
  25. nexys_video         | xc7a200tsbg484-1
  26. sp701               | xc7s100fgga676-2
  27. sword               | xc7k325tffg900-2
  28. zc702               | xc7z020clg484-1
  29. zcu104              | xczu7ev-ffvc1156-2-e
  30. zcu106              | xczu7ev-ffvc1156-2-e
  31. zed                 | xc7z020clg484-1
  32. zedboard            | xc7z020clg484-1
  33. zybo                | xc7z010clg400-1
  34. zybo-z7-10          | xc7z010clg400-1
  35. zybo-z7-20          | xc7z020clg400-1

If you want to add/modify boards name, edit XML files in /path/to/Xilinx/Vivado/20xx.x/data/boards/board_files/.

License

MIT License

Vivado HLS is trademark of Xilinx.

Contact

Author: Kenta Arai

Twitter: @isKenta14