项目作者: jwrr

项目描述 :
Z80 + USB + TinyFPGA-BX in Verilog using open-source Yosys+NextPNR
高级语言: Verilog
项目地址: git://github.com/jwrr/z80usb.git
创建时间: 2020-09-03T00:42:08Z
项目社区:https://github.com/jwrr/z80usb

开源协议:Apache License 2.0

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z80usb

Description

tinyfpga-bx + usb + z80 + morse code

This project combines a USB core with the 8-bit Z80 processor on the TinyFPGA-
BX. C code running on the Z80 generates Morse Code that blinks on the LED.
When the board starts up it blinks a default message on the LED. When you
type into the terminal, your message blinks on the LED. Your message is
also echo’ed back to the terminal display. If you don’t type for a while, the
default message starts to blink again.

The TinyFPGA-BX is a small
circuit board with a Lattice ICE40LP8K FPGA, a USB interface, many IO and one LED.

The ICE40LP8K can, of course, be programmed with proprietary Lattice Tools. But
what’s really interesting is that it can also be programmed using the open
tool-chain from Project IceStorm,
including the Yosys Synthesis Suite, and the
NextPNR Place and Route Tool. Given the
secretive nature of FPGA vendors, I was sceptical of an open tool chain, but
I’ve used it for a while and find it very stable and produces good results.
Congratulations to the team. I look forward to trying
Project X-Ray on an
Arty-7.

The ICE40LP8K has 7680 Look-Up Tables (LUTs), 32 4Kbit Embedded Block
memories (EBRAMs) and a PLL. It’s not huge but it’s enough to do quite a few
low-cost projects.

Most boards with a USB interface use a FTDI (or clone) chip to handle the USB protocol.
The TinyFPGA-BX has FPGA code that handles the
USB interface.
This approach uses FPGA resources but it allows for a simpler,lower-cost board
design.

I’ve become re-interested in the classic Heathkit H89.
My dad built a couple in the late 1970s. It had a Zilog Z80 processor.
The TV80 is a verilog implementaton of the
Z80. It can be programmed using the open-source
Small Device C Compiler. The
iceZ0mb1e provides a good starting
point, instantiating the TV80 with several usefule IO blocks and memory.

License

This project is licensed under the Apache 2 License,
which is the permissive license used by the USB core. IceZ0mbie and my source
files are licensed under the even-more-permissive MIT License.

Some of my change have been PR’ed upstream to the iceZ0mb1e project. But I’m not
sure if the Apache-licensed USB-core can integrated into the MIT-Licensed
Icez0mb1e. I’m no license expert, but my feeble understanding is that MIT can
be merged into Apache, but Apache can’t be merged into MIT (please correct me
if I’m wrong).

Repos Used by the Project

Download and Install

These steps clone the repo and download the submodules (most of the work is in
the submodules).

  1. git clone https://github.com/jwrr/z80usb
  2. cd z80usb
  3. git submodule update --init

Build Instructions

  1. make init
  2. make clean
  3. make main MAIN=morse
  4. make copy
  5. make

Program the FPGA

  1. tinyprog -p z80usb.bin (with TinyFPGA-BX connected)

Terminal Program

  1. # Find COM-port
  2. apio system --lsserial
  • Putty
    • Terminal -> Implicit LF in every CR
    • Serial -> COM8 (or whatever you commport is) -> Open