项目作者： CMU-SAFARI

项目描述：

  This repository provides characterization data collected over 96 DDR3 SO-DIMMs, related to the following paper:  Lee et al., "Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms", SIGMETRICS 2017. https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-paper.pdf

高级语言： AGS Script

项目主页：

项目地址: git://github.com/CMU-SAFARI/DIVA-DRAM.git

创建时间： 2017-05-02T19:31:43Z
项目社区：https://github.com/CMU-SAFARI/DIVA-DRAM
开源协议：
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DIVA-DRAM

This repository provides characterization data collected over 96 DDR3 SO-DIMMs, related to the following papers.

Lee et al., “Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms
“, SIGMETRICS 2017
Lee et al., “Understanding and Exploiting Design-Induced Latency Variation in Modern DRAM Chips“, arXiv:1610.09604

SPICE_MODEL

This directory contains the SPICE model of a DRAM array, which is used for the simulation data in APPENDIX B of the SIGMECTRISC 2017 paper. The tool used for the simulation is LTspice.

PROFILE_DATA

This directory contains the data collected from our experiments.
vendor/summary: contains a quick overview of how many error bits are observed at different DRAM test conditions.
vendor/rawdata: contains detailed error information of the evaluated DIMMs, which is used for Sections 5 and 6 of the SITMECTRIC 2017 paper.
vendor/analysis: contains the collected and analyzed data for the papers.

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